|
|
Нет, это понятно.Пробовал,не пашет.Видимо я как-то неправильно провожу инициализацию.Сама она взята из language templates ISE. Может перед Begin нужно ещё как-то сам компонент описать, а уже после generic map u port map,либо я что-то напутал? В общем подскажите правильный листинг пожалуста.
Если как Вы говорили поставить после бегина, это так?
----------------Всё равно не пашущий листинг-------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
library UNISIM;
use UNISIM.VComponents.all;
entity BUFER_FOR_CANAL is
Port ( clk : in STD_LOGIC;
we : in STD_LOGIC;
addr : in STD_LOGIC_VECTOR (7 downto 0);
di : in STD_LOGIC_VECTOR (15 downto 0);
do : out STD_LOGIC_VECTOR (15 downto 0));
end BUFER_FOR_CANAL;
architecture syn of BUFER_FOR_CANAL is
type ram_type is array (255 downto 0) of std_logic_vector (15 downto 0);
signal RAM : ram_type;
signal read_addr : std_logic_vector (7 downto 0);
begin
BUFER_FOR_CANAL : RAMB4_S16
generic map (
INIT_00 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_01 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_02 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_03 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_04 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_05 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_06 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_07 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_08 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_09 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0A => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0B => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0C => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0D => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0E => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0F => X"0000000000000000000000000000000000000000000000000000000000000000")
port map (
clk => clk,
we => we,
addr => addr,
di => di,
do => do);
process(clk)
begin
if (clk'event and clk='1') then
if (we='1') then
RAM(conv_integer(addr))<=di;
end if;
read_addr<=addr;
end if;
end process;
do<=RAM(conv_integer(read_addr));
end syn;
---------------------------------------------------------------------
После строчки BUFER_FOR_CANAL : RAMB4_S16 пишет Formal EN of RAMB4_S16 with no default value must be associated with an actual value.
|
|
