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Приветствую !
module selector(in, out, en);
parameter bus_width=4, buses=3;
input [bus_width*buses-1:0] in;
input [buses-1:0] en;
output [bus_width-1:0] out;
integer i,j;
reg [bus_width-1:0] tmp;
reg [buses-1:0] tm;
assign out=~tmp;
always @*
begin
for(j=0 ; j < bus_width ; j = j+1 )
begin
for(i=0 ; i < buses; i = i+1 )
tm[i]=in[i*bus_width+j];
tmp[j]=tm=={buses{1'b1}} && en[j];
end
end
endmodule
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