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Exemplar Leonardo Spectrum 20001b.106.
Xilinx ISE 4.1
При использовании штатного средства синтеза на кристалле всё размещается с учетом атрибута LOC. Однако если использовать Leonardo, задать расположение не удается. Подскажите, пожалуйста, из-за чего так.
========================= top.vhd ======================
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity top is
Port (
clock: in STD_LOGIC;
reset: in STD_LOGIC;
ce, load, dir1, dir2: in STD_LOGIC;
din1, din2: in STD_LOGIC_VECTOR(15 downto 0);
count1, count2: inout STD_LOGIC_VECTOR(15 downto 0)
);
end top;
architecture Structural of top is
component counter
port (
CLK: in STD_LOGIC;
RESET: in STD_LOGIC;
CE, LOAD, DIR: in STD_LOGIC;
DIN: in STD_LOGIC_VECTOR(15 downto 0);
COUNT: inout STD_LOGIC_VECTOR(15 downto 0)
);
end component;
attribute LOC: string;
attribute LOC of C1: label is "CLB_R1C1:CLB_R16C1"; -- HERE IT IS!
attribute LOC of C2: label is "CLB_R1C2:CLB_R16C2"; -- HERE IT IS!
begin
C1: counter port map (clock, reset, ce, load, dir1, din1, count1);
C2: counter port map (clock, reset, ce, load, dir2, din2, count2);
end Structural;
========================= counter.vhd ======================
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity Counter is
Port (
CLK: in STD_LOGIC;
RESET: in STD_LOGIC;
CE, LOAD, DIR: in STD_LOGIC;
DIN: in STD_LOGIC_VECTOR(15 downto 0);
COUNT: inout STD_LOGIC_VECTOR(15 downto 0)
);
end Counter;
architecture Behavioral of Counter is
begin
-- Required Libraries
--library IEEE;
--use IEEE.STD_LOGIC_1164.ALL;
--use IEEE.STD_LOGIC_UNSIGNED.ALL;
--use IEEE.STD_LOGIC_ARITH.ALL;
-- 4-bit synchronous counter with count enable,
-- asynchronous reset and synchronous load
process (CLK, RESET)
begin
if RESET='1' then
COUNT <= "0000000000000000";
elsif CLK='1' and CLK'event then
if LOAD='1' then
COUNT <= DIN;
else
if CE='1' then
if DIR='1' then
COUNT <= COUNT + 1;
else
COUNT <= COUNT - 1;
end if;
end if;
end if;
end if;
end process;
end Behavioral;
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