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Application Note (AP-392) 7
6.0 82559 Board Design Considerations
6.1 Clock Source
The 82559 can operate from either its internal oscillator using a 25 MHz crystal or an external
oscillator as a 25 MHz clock source. If a crystal is used, then it should be connected across the X1
and X2 input pins. If an external oscillator is used, then it can be connected directly to the X1 input,
with X2 left unconnected. In both cases the clock should be accurate within 50ppm. The 82559
can also provide its internal clock as an output on the CLK25 pin (pin N9, which is multiplexed
with FLA[16]). The clock out function is enabled by asserting the CLKEN pin during PCI reset.
The CLKEN pin is multiplexed with FLA[7].
A sampling of crystals that meet the specifications outlined is listed below:
6.2 LED Indicators
The 82559 provide three indication LED outputs:
• Link (LILED)
• Activity (ACTLED)
• Speed (SPEEDLED)
The 82559 can sink up to 10 mA of current for each LED.
6.3 Magnetics Selection
One of the most critical component choices in a 100 Mbps Ethernet design is the magnetics
module. The module has a critical effect on overall IEEE and emissions compliance. The device
selected should meet the performance required for a design. Occasionally, components that meet
basic specifications may cause the system (LOM, adapter, repeater, etc.) to fail because of
unintentional interactions with board effects. Examples of these phenomena could be an
unexpected series or parallel capacitance values or unexpected series inductance values within the
magnetics module. This could cause the overall design to fail certain IEEE specifications.
Qualifying a new magnetics module can help to alleviate these sorts of issues. The three-step
process outlined below is recommended when evaluating suppliers:
1. Verify vendor’s specification.
The component should have more margins than the system specification. For example, “Does
the module have a minimum of 400 µH of open circuit inductance (OCL) with 8 mA of DC
Bias?”.
2. Check module’s electrical qualifications.
The electrical specifications of the module should be verified by performing stand-alone
electrical qualification. Several modules should be tested (not in circuit) with two goals in
mind:
Manufacturer Manufacturer’s Part Number
Raltron TT-SMDC-25.00-20-T
Epson-Seiko MA-406-25.000M-20PF
82559 LOM Design Guide
8 Application Note (AP-392)
a. Does the component meet the published specifications?
b. Does the vendor's published data correlate to the measured data?
3. Perform IEEE conformance tests
System level IEEE PHY conformance and EMC (FCC and EN) testing should be done to
verify that the system meets all electrical requirements with the new component.
A sampling of modules that meet the specifications outlined is listed below:
6.4 Trace Routing
Generic Trace routing considerations for final layout are described in the LAN On Motherboard
(LOM) Design guide Application Note (AP-391). 82559 specific layout information can be found
in the 82559 Printed Circuit Board (PCB) Design Application Note (AP-399). Critical layout issues
are covered in the following section for completeness. Critical signal traces should be kept as short
as possible to decrease the likelihood of being affected by high frequency noise from other signals,
including those propagated through power and ground planes. Capacitive loading, which is caused
by the signal trace, can also be reduced by keeping the traces as short as possible. Maximum separation
between differential pairs should be no more than one tenth of an inch as illustrated in the
figure below.
6.5 Signal Terminations
A single 100 W (1%) resistor is used to terminate the transmit differential (TDP/TDN) pair. For the
receive differential (RDP/RDN) pairs, a 120 W (1%) resistor was utilized. The 120 W resistor was
used in the layout of this design because of the improvements in receive performance, the designer
may want to experiment with values from 100 W to 120 W on the receive side. They should be
placed as close to the 82559 as possible.
6.5.1 Termination Plane
Resistors are used to terminate noise from the unused inputs of both the RJ45 connector and the
magnetics module to the termination plane. The netname TERMPLANE (for termination plane) is
provided as a guide to the termination plane. A termplane is a plane fabricated into the printed
circuit board (PCB) substrate. This plane, which has no DC termination, acts like a capacitive path
for the coupled noise.
Manufacturer Manufacturer’s Part Number
Pulse Engineering H1012T
Pulse Engineering H1088
Pulse Engineering H1138
Bel Fuse S558-5999-46
Bel Fuse S558-5999-K7
Application Note (AP-392) 9
82559 LOM Design Guide
6.5.2 Termination Plane Capacitance
It is recommended that the termination plane capacitance equal a minimum value of 1500 pF. This
helps reduce the amount of cross-talk on the differential pairs (TDP/TDN and RDP/RDN) from the
unused pairs of the RJ45. Pads may be placed for additional capacitance, which may be required
due to failure of electrical fast transient testing. If 1500pf is not achievable, then the series capacitor
may need to be populated.
6.6 Critical Dimensions
There are two critical dimensions that must be considered during the layout phase of an 82559
LOM implementation. These dimensions are identified in Figure 2 as A and B:
6.6.1 Distance A: Magnetics to RJ45 (Priority 1)
The distance labeled “A” in Figure 2 should be given the highest priority in board layout. The
distance between the magnetics module and the RJ45 connector should be kept to less than one
inch of separation. The following trace characteristics are important and should be observed:
1. Differential Impedance: The differential impedance should be 100 W. The single ended trace
impedance will be approximately 50 W; however, the differential impedance can also be
affected by the spacing between the traces.
2. Trace Symmetry: Differential pairs (such as TDP and TDN) should be routed with consistent
separation and with exactly the same lengths and physical dimensions (for example, width).
Caution: Asymmetrical and unequal length traces in the differential pairs contribute to common mode noise.
This can degrade the receive circuit’s performance and contribute to radiated emissions from the
transmit circuit.
If the 82559 must be placed further than a couple of inches from the RJ45 connector, distance B
can be sacrificed. Keeping distance A as short as possible should be a priority.
Figure 2. Critical Dimensions for Component Placement
82559 Fast Ethernet
Contoller
Magnetics
RJ45
Flash
(optional)
EEPROM
B A
82559 LOM Design Guide
6.6.2 Distance B: PHY to Magnetics (Priority 2)
Distance B from Figure 2 should also be designed to extend less than one inch between devices.
The high speed nature of the signals propagating through these traces requires that the distance
between these components are closely observed. In general, any section of traces that is intended
for use with high speed signals should observe proper termination practices.
Proper termination of signals can reduce reflections caused by impedance mismatches between
devices and traces. The reflections of a signal may have a high frequency component that may
contribute more EMI than the original signal itself. For this reason, these traces should be designed
to a 100 W differential value.
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