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Fujitsu MB90455 Series (FLASH 24...64k, RAM 2k., 48-pin plastic-LQFP)
(«Телесистемы»: Конференция «Микроконтроллеры и их применение»)

миниатюрный аудио-видеорекордер mAVR

Отправлено Алексей Мусин 05 декабря 2002 г. 07:35


DESCRIPTION

MB90455 series devices are general-purpose high-performance 16-bit micro controllers
designed for process control of consumer products, which require high-speed real-time processing. The system, inheriting the architecture of F?MC* family, employs additional instruction ready for high-level languages, expanded addressing mode, enhanced multiply- divide instructions, and enriched bit-processing instructions. Furthermore, employment of 32-bit accumulator achieves processing of long-word data (32 bits). The peripheral resources of MB90455 series include the following:
8/10-bit A/D converter, UART 1, 8/16-bit PPG timer, 16-bit input-output timer (16-bit free-run timer, input capture 0, 1, 2, 3 (ICU)). *: "F?MC", an abbreviation for FUJITSU Flexible Microcontroller, is a registered trademark of FUJITSU Ltd.

FEATURES

Clock

Built-in PLL clock frequency multiplication circuit


Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and multiplication of 1 to 4 times of oscillation clock (for 4-MHz oscillation clock, 4 MHz to 16 MHz).


Operation by sub-clock (8.192 kHz) is allowed.


Minimum execution time of instruction: 62.5 ns (when operating with 4-MHz oscillation clock, and 4-time multiplied PLL clock).

16 Mbyte CPU memory space

24-bit internal addressing

Instruction system best suited to controller

Wide choice of data types (bit, byte, word, and long word)


Wide choice of addressing modes (23 types)


Enhanced multiply-divide instructions and RETI instructions


Enhanced high-precision computing with 32-bit accumulator

Instruction system compatible with high-level language (C language) and multitask

Employing system stack pointer


Enhanced various pointer indirect instructions


Barrel shift instructions

Increased processing speed

4-byte instruction queue

Powerful interrupt function with 8 levels and 34 factors


Automatic data transfer function independent of CPU

Expanded intelligent I/O service function (EI2 OS): Maximum of 16 channels

Low power consumption (standby) mode

Sleep mode (a mode that halts CPU operating clock)


Time-base timer mode (a mode that operates oscillation clock, sub clock, time-base timer and clock timer only)


Clock mode (a mode that operates sub clock and clock timer only)


Stop mode (a mode that stops oscillation clock and sub clock)


CPU blocking operation mode

Process

CMOS technology

I/O port

General-purpose input/output port (CMOS output): 34 ports(MB90F455/F456/F457, MB90455/456/457) (including 4 high-current output ports) (When sub clock is not used, 36 ports(MB90F455S/F456S/F457S, MB90455S/456S/457S))

Timer

Time-base timer, clock timer, watchdog timer: 1 channel


8/16-bit PPG timer: 8-bit x 4 channels, or 16-bit x 2 channels


16-bit reload timer: 2 channels


16-bit input/output timer

16-bit free run timer: 1 channel


16-bit input capture: (ICU): 4 channels
Interrupt request is issued upon latching a count value of 16-bit free run timer by detection of an edge on pin input.

UART 1: 1 channel

Equipped with full-duplex double buffer


Clock-asynchronous or clock-synchronous serial transmission is available
DTP/External interrupt: 4 channels


Module for activation of expanded intelligent I/O service (EI2OS), and generation of external interrupt.

Delay interrupt generator module

Generates interrupt request for task switching.

8/10-bit A/D converter: 8 channels

Resolution is selectable between 8-bit and 10-bit.


Activation by external trigger input is allowed.


Conversion time: 6.125 ms (at 16-MHz machine clock, including sampling time)

Program patch function

Address matching detection for 2 address pointers.


Package: 48-pin plastic-LQFP

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