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#define ACLK 32768
#define TCLK 3686400L#ifdef XT1_LF
#define FLLStart() CCTL2=CCIBIn|CapNegative|CAP|OUT|CCIE // ; Define CCR2,CAP,ACLK, enable Ints, OUT flags first int
#define BCSCTL1Mask _XT2OFF|_XT1Lo|ACLKdiv8#else
#define FLLStart()
#define BCSCTL1Mask _XT2OFF|_XT1Hi|ACLKdiv1
#endifА на асме
rseg UDATA0
#ifdef XT1_LF
DCOCount ds 2 ; Counter for SW FLL
#endifrseg CODE
TimerAint:
add &TAIV,PC
reti ;NI
reti ;CCP1
#ifdef XT1_LF
jmp DCOInt
#else
reti ;CCP2
#endif
reti ;NI
reti ;NI
br #TAhandler ;TAIFG#ifdef XT1_LF
Delta equ TCLK/ACLKDCOInt
bit #OUT,&CCTL2
jnz FLLFirst
push R12
mov &CCR2,R12
sub &DCOCount,R12
mov &CCR2,&DCOCount
cmp #Delta,R12
pop R12
jl IncDCO
jeq DoneDCO
DecDCO
cmp.b #0x0,&DCOCTL
jeq DCORstepDown
dec.b &DCOCTL
reti
DCORstepDown
cmp.b #BCSCTL1Mask|InternalR0,&BCSCTL1
jeq DCOErr
clr.b &DCOCTL
dec.b &BCSCTL1
reti
IncDCO
cmp.b #0xFF,&DCOCTL
jeq DCORstepUp
inc.b &DCOCTL
reti
DCORstepUp
cmp.b #BCSCTL1Mask|InternalR7,&BCSCTL1
jeq DCOErr
clr.b &DCOCTL
inc.b &BCSCTL1
reti
DoneDCO
clr &CCTL2
DCOErr
reti
FLLFirst
bic #OUT,&CCTL2
mov &CCR2,&DCOCount
reti
#endif
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