Я уже, честно говоря, весь извелся. Документацию зачитал. Ничего не выходит:

#include "AT91SAM9XE512.h"
#include "ohci.h"

// UHP HCCA memory location:
__align(32) AT91S_UHP_HCCA HCCA;

// UHP transfer descriptors:
__align(32) AT91S_UHP_ED pUHPEd[1];
__align(32) AT91S_UHP_ED pUHPTd[4];

// UHP data area
const char pUHPSetup[8] = {0x80,0x06,0x00,0x01,0x00,0x00,0x40,0x00};

char pUHPData[18];

//*----------------------------------------------------------------------------
//* Init a pre-allocated endpoint descriptor. !!!
//* ED must be aligned on a 16 bytes boundary
//*----------------------------------------------------------------------------
__inline void AT91F_CreateEd(
	unsigned int EDAddr,
	unsigned int MaxPacket,
	unsigned int TDFormat,
	unsigned int Skip,
	unsigned int Speed,
	unsigned int Direction,
	unsigned int EndPt,
	unsigned int FuncAddress,
	unsigned int TDQTailPntr,
	unsigned int TDQHeadPntr,
	unsigned int ToggleCarry,
	unsigned int NextED)
{
	AT91PS_UHP_ED pED = (AT91PS_UHP_ED) EDAddr;
	pED->Control = (MaxPacket << 16) | (TDFormat << 15) |
	               (Skip << 14) | (Speed << 13) | (Direction << 11) |
	               (EndPt << 7) | FuncAddress;
	pED->TailP   = (TDQTailPntr & 0xFFFFFFF0);
	pED->HeadP   = (TDQHeadPntr & 0xFFFFFFF0) | (ToggleCarry << 1);
	pED->NextEd  = (NextED & 0xFFFFFFF0);
}

//*----------------------------------------------------------------------------
//* Init a pre-allocated transfer descriptor. !!!
//* TD must be aligned on a 16 bytes boundary
//*----------------------------------------------------------------------------
__inline void AT91F_CreateGenTd(
	unsigned int GenTdAddr,
	unsigned int DataToggle,
	unsigned int DelayInterrupt,
	unsigned int Direction,
	unsigned int BufRnding,
	unsigned int CurBufPtr,
	unsigned int NextTD,
	unsigned int BuffLen)
{
	AT91PS_UHP_TD pTD = (AT91PS_UHP_TD) GenTdAddr;
	pTD->Control = (DataToggle << 24) | (DelayInterrupt << 21) | (Direction << 19) | (BufRnding << 18);
	pTD->CBP     = CurBufPtr;
	pTD->NextTD  = (NextTD & 0xFFFFFFF0);
	pTD->BE      = (BuffLen) ? CurBufPtr + BuffLen - 1 : CurBufPtr;
}

//Main ...
int main()
{
	// Forcing UHP_Hc to reset
	AT91C_BASE_UHP->UHP_HcControl = 0;

	// Writing the UHP_HCCA
	AT91C_BASE_UHP->UHP_HcHCCA = (unsigned int) &HCCA;

	// Enabling list processing
	//pUhp->UHP_HcControl = 0;

	// Set the frame interval
	AT91C_BASE_UHP->UHP_HcFmInterval = 0x2710;
	AT91C_BASE_UHP->UHP_HcPeriodicStart = 0x2240;

	// Create a default endpoint descriptor
	AT91F_CreateEd(
		(unsigned int) pUHPEd, // ED Address
		8,      // Max packet
		0,      // TD format
		0,      // Skip
		1,      // Speed ("1" <=> "Low")
		0x0,    // Direction
		0x0,    // Endpoint
		0x0,    // Func Address
		(unsigned int) &pUHPTd[3],    // TDQTailPointer
		(unsigned int) &pUHPTd[0],    // TDQHeadPointer
		0,      // ToggleCarry
		0x0);   // NextED

	// Setup PID
	AT91F_CreateGenTd(
		(unsigned int) &pUHPTd[0],    // TD Address
		2,      // Data Toggle
		0x7,    // DelayInterrupt
		0x0,    // Direction
		1,      // Buffer Rounding
		(unsigned int) pUHPSetup,  // Current Buffer Pointer
		(unsigned int) &pUHPTd[1],    // Next TD
		8);     // Buffer Length

	// Data IN
	AT91F_CreateGenTd(
		(unsigned int) &pUHPTd[1],    // TD Address
		0,      // Data Toggle
		0x7,    // DelayInterrupt
		0x2,    // Direction
		1,      // Buffer Rounding
		(unsigned int) pUHPData,  // Current Buffer Pointer
		(unsigned int) &pUHPTd[2],    // Next TD
		18);  // Buffer Length

	// Status OUT
	AT91F_CreateGenTd(
		(unsigned int) &pUHPTd[2],    // TD Address
		3,      // Data Toggle
		0x7,    // DelayInterrupt
		0x1,    // Direction
		1,      // Buffer Rounding
		0x0,    // Current Buffer Pointer
		(unsigned int) &pUHPTd[3],   // Next TD
		0x0);   // Buffer Length

	AT91F_CreateGenTd(
		(unsigned int) &pUHPTd[3],    // TD Address
		3,      // Data Toggle
		0x7,    // DelayInterrupt
		0x1,    // Direction
		1,      // Buffer Rounding
		0x0,    // Current Buffer Pointer
		(unsigned int) 0,   // Next TD
		0x0);   // Buffer Length

	// Programming the BHED
	AT91C_BASE_UHP->UHP_HcControlHeadED = (unsigned int) pUHPEd;

	// Programming the BCED
	AT91C_BASE_UHP->UHP_HcControlCurrentED = (unsigned int) pUHPEd;

	// Initializing the UHP_HcDoneHead
	AT91C_BASE_UHP->UHP_HcBulkDoneHead   = 0x00;
	HCCA.UHP_HccaDoneHead = 0x0000;

	// Forcing UHP_Hc to Operational State
	AT91C_BASE_UHP->UHP_HcControl = 0x80;

	// Enabling port power
	AT91C_BASE_UHP->UHP_HcRhPortStatus[0] = 0x00000100;
	AT91C_BASE_UHP->UHP_HcRhPortStatus[1] = 0x00000100;

	AT91C_BASE_UHP->UHP_HcRhStatus = 0x00010000;

	// Íàñòðàèâàåì GPIO
    AT91C_BASE_PIOB->PIO_PER = 0x80000000;
    AT91C_BASE_PIOB->PIO_OER = 0x80000000;
    AT91C_BASE_PIOB->PIO_IDR = 0x80000000;
    AT91C_BASE_PIOB->PIO_MDDR = 0x80000000;
    AT91C_BASE_PIOB->PIO_PUDR = 0x80000000;
    AT91C_BASE_PIOB->PIO_CODR = 0x80000000;
    AT91C_BASE_PIOB->PIO_IFDR = 0x80000000;
    AT91C_BASE_PIOB->PIO_OWER = 0x80000000;

	/* ************************************************ */
	/* Detect a connected deviced, generate a reset...  */
	/* ************************************************ */
	// UHP: Detect the device on one port, generate a reset and enable the port
	while (1){
		if ( (AT91C_BASE_UHP->UHP_HcRhPortStatus[0] & 0x01) ){
			AT91C_BASE_UHP->UHP_HcRhPortStatus[0] = (1 << 4); // SetPortReset
            //Wait for the end of reset
			while (AT91C_BASE_UHP->UHP_HcRhPortStatus[0] & (1 << 4));
			AT91C_BASE_UHP->UHP_HcRhPortStatus[0] = (1 << 1); // SetPortEnable
			break;
		                                                     }
             }
    AT91C_BASE_PIOB->PIO_SODR = 0x80000000; //Âûâåñòè "1" íà ëèíèè PB31
	// UHP: UHP is now operational and control list processing is enabled
	AT91C_BASE_UHP->UHP_HcControl = 0x90;

	/* ************************************************ */
	/* Generate traffic between UHP and UDP             */
	/* ************************************************ */
	// UHP: Notify the Hc that the Control list is filled
	AT91C_BASE_UHP->UHP_HcCommandStatus = 0x02;

	while (1);
}