Отправлено Linuxoid 02 сентября 2002 г. 12:41 В ответ на: По какой причине бит готовности данных (DTRDY) в AD7705 находиться всегда в "1"(+) отправлено gdi 02 сентября 2002 г. 11:35

;------------------------------------------------------------
; Target MCU: AT90S2313
; Quartz: 8 MHz MHz
; AD7705 uses own quartz (4.512 MHz)
;------------------------------------------------------------
; Чтение данных с двух каналов. Тайм-аут на ожидание сигнала
; готовности от AD7705 0.9 сек
;------------------------------------------------------------
; Reset serial interface: send sequence of 32 '1'
res_7705_serial:

cli
en_7705
ldi a,32
sbi portd,dout
r77:
rcall tiny_delay
sclk_lo
rcall tiny_delay
sclk_hi

dec a
brne r77
dis_7705
sei

; Active Channel is Ain2+/Ain2-,
; next operation is write to the clock register
ldi a,$21
rcall movb_7705

; master clock enabled, 4.9512 MHz clock,
; set output rate to 50 Hz
ldi a,$0c
rcall movb_7705

main: wdr

clr zero
ldi yl,low (rambeg)
ldi yh,high(rambeg)

sbrc axflg,wepr
rcall store_eeprom

; Active Channel is Ain2+/Ain2-, next
; operation is write to the setup register
ldi a,$11
rcall movb_7705

; gain=2, unipolar mode, buffer on,
; clear FSYNC and perform a self-calibration
ldi a,$46 | (Gain2<<3)
rcall movb_7705

; start time-out
clr tmr77 ; reset timer
cbr flags,1< sbr flags,1<
; wait for DRDY signal
wdr
sbrc flags,ex77 ; time-out expired ?
rjmp res_7705_serial
sbic pind,drdy
rjmp pc-4

cbr flags,1< led_on

; Read data from Channel Ain2+/Ain2-
ldi a,$39
rcall movb_7705

; Ain2 high byte
clr a
rcall movb_7705
std Y+Ain2+1,a

; Ain2 low byte
clr a
rcall movb_7705
std Y+Ain2+0,a

sbis pind,drdy
rjmp res_7705_serial

; Active Channel is Ain1+/Ain1-,
; next operation is write to the setup register
ldi a,$10
rcall movb_7705

; gain=32, unipolar mode, buffer on,
; clear FSYNC and perform a self-calibration
ldi a,$46 | (Gain1<<3)
rcall movb_7705

; start time-out
clr tmr77
sbr flags,1<
; wait for DRDY signal
wdr
sbrc flags,ex77
rjmp res_7705_serial
sbic pind,drdy
rjmp pc-4

led_off

; Read data from Channel Ain1+/Ain1-
ldi a,$38
rcall movb_7705

; Ain1 high byte
clr a
rcall movb_7705
std Y+Ain1+1,a

; Ain1 low byte
Read_Ain1L:
clr a
rcall movb_7705
std Y+Ain1+0,a

; Disable timer, there is answer from AD7705
cbr flags,(1<;-----------------------------------------------------
.macro en_7705
cbi portb,cs
.endm
.macro dis_7705
sbi portb,cs
.endm

.macro sclk_hi
sbi portd,sclk
.endm
.macro sclk_lo
cbi portd,sclk
.endm
;-----------------------------------------------------
; takes 7 sycles
; registers used: none
tiny_delay:
ret
;-------------------------------
; Out byte by virtual SPI
; Input data: a-register
; Output data: a-register
; Registers used: a,b
movb_7705:
cli
en_7705

ldi b,8

clock_fall:
sclk_lo

; put bit out
sbrc a,7
sbi portd,dout
sbrs a,7
cbi portd,dout
rcall tiny_delay

; get bit in
lsl a
sbic pind,din
sbr a,1

; clock_rise:
sclk_hi
rcall tiny_delay

dec b
brne clock_fall

dis_7705
sei

ret

;-------------------------------