;----------------------------------------------------------------------------
;I2C bus 1 support:
;Start I2C-1 communications:
;Input: temp - device address
I2C1_Start:
Port_SDA1_0 ;force SDA low
rcall I2C_qp_delay ;quarter period delay
;Write data byte via I2C-1:
;Input: temp - data byte
;Out: C = ASK
I2C1_Wr:
sec ;set carry flag
rol temp ;shift in carry and out bit one
rjmp i2c1_wr_first
i2c1_wr_bit:
lsl temp ;if transmit register empty
i2c1_wr_first:
breq i2c1_get_ack ; goto get acknowledge
Port_SCL1_0 ;force SCL low
brcc i2c1_wr_low ;if bit high
nop ; (equalize number of cycles)
Port_SDA1_Z ; release SDA
rjmp i2c1_wr_high
i2c1_wr_low: ; else
Port_SDA1_0 ; force SDA low
rjmp i2c1_wr_high ; (equalize number of cycles)
i2c1_wr_high:
rcall I2C_hp_delay ;half period delay
Port_SCL1_Z ;release SCL
rcall I2C_hp_delay ;half period delay
rjmp i2c1_wr_bit
i2c1_get_ack:
Port_SCL1_0 ;force SCL low
nop
nop
Port_SDA1_Z ;release SDA
rcall I2C_hp_delay ;half period delay
Port_SCL1_Z ;release SCL
rcall I2C_hp_delay ;half period delay
clc ;clear carry flag
Skip_if_Port_SDA1_0 ;if SDA is high
sec ; set carry flag
rcall I2C_hp_delay ;half period delay
ret
;Read data byte via I2C-1:
;Out: temp - data byte
I2C1_Rd:
ldi temp,0x01 ;data = 0x01
i2c1_rd_bit: ;do
Port_SCL1_0 ; force SCL low
rcall I2C_hp_delay ; half period delay
Port_SCL1_Z ; release SCL
rcall I2C_hp_delay ; half period delay
clc ; clear carry flag
Skip_if_Port_SDA1_0 ; if SDA is high
sec ; set carry flag
rol temp ; store data bit
brcc i2c1_rd_bit ;while receive register not full
Port_SCL1_0 ;force SCL low
nop
nop
Port_SDA1_0 ;force SDA low (ASK=0)
rcall I2C_qp_delay ;quarter period delay
Port_SCL1_Z ;release SCL
rcall I2C_hp_delay ;half period delay
ret
;Stop I2C-1 communications:
I2C1_Stop:
Port_SCL1_0 ;force SCL low
nop
nop
Port_SDA1_0 ;force SDA low
rcall I2C_hp_delay ;half period delay
Port_SCL1_Z ;release SCL
rcall I2C_qp_delay ;quarter period delay
Port_SDA1_Z ;release SDA
rcall I2C_hp_delay ;half period delay
ret
;----------------------------------------------------------------------------
;I2C half clock period delay:
;(normal: 5.0us / fast: 1.3us)
I2C_hp_delay:
ldi Cnt,I2CDelHp
i2c_hp_delay_loop:
dec Cnt
brne i2c_hp_delay_loop
ret
;I2C quarter clock period delay:
;(normal: 2.5us / fast: 0.6us)
I2C_qp_delay:
ldi Cnt,I2CDelQp
i2c_qp_delay_loop:
dec Cnt
brne i2c_qp_delay_loop
ret