main_cy:
        ldi     minus_1_container,low(-1)               ;1

        in      current_port_l,pinc                     ;1
        in      current_port_h,pinb                     ;1

        movw    temporary_l,current_port_l              ;1

        eor     temporary_l,old_port_l                  ;1
        eor     temporary_h,old_port_h                  ;1

        movw    old_port_l,current_port_l               ;1

        and     temporary_l,current_port_l              ;1
        and     temporary_h,current_port_h              ;1


        sbrs    temporary_l,0                           ;2
        rjmp    other_L_channel_analyse

        lds     current_port_l,channel_0_counter        ;2
        lds     current_port_h,channel_0_counter+1      ;2
        lds     _3_byte_counter,channel_0_counter+2     ;2

        sub     current_port_l,minus_1_container        ;1
        sbc     current_port_h,minus_1_container        ;1
        sbc     _3_byte_counter,minus_1_container       ;1
        sbc     _4_byte_ch_0_counter,minus_1_container  ;1

        sts     channel_0_counter,current_port_l        ;2
        sts     channel_0_counter+1,current_port_h      ;2
        sts     channel_0_counter+2,_3_byte_counter     ;2
                                                        ;*8
other_L_channel_analyse:

; Total = 61/301 clocks (16 pins set/16 pins cleared resp.)
; Average = 173 clocks @8 pins set or 11 clocks per a 24-bit counter channel

main_cy:
	mov	#counter_array_start,cntptr_reg		; 1

	mov	PORTB,temp_reg				; 1
	exch	temp_reg,old_reg
	xor	temp_reg,old_reg,temp_reg		; 1
	and	temp_reg,old_reg,temp_reg		; 1

	do	#15,1f					; 2+1*16 = 17

	lsr	temp_reg,#1,temp_reg			; 1*16 = 16
	addc	[cntptr_reg],#0,[cntptr_reg++]		; 1*16 = 16
1:	addc	[cntptr_reg],#0,[cntptr_reg++]		; 1*16 = 16

	return						; 3

; Total = 72 clocks per 16 channels or 4.5 clocks per a 32-bit counter channel
; Inlining a DO loop gives total = 55 clocks or 3.5 clocks per a 32-bit counter channel
; Feel The Fucking Difference! :))