Отправлено Anatoly 22 февраля 2001 г. 19:25 В ответ на: Работаю с PCI-шиной, как уменьшить время загрузки процессора? Локальная сторона PCI9050 подтормаживает ... Может кто слыхал про пакетное чтение? или др. отправлено Mike 21 февраля 2001 г. 17:54

First of all please make sure that the burst enable bit is set in the PLX registers (You can read/write the PLX registers by using P9050_ReadReg and P9050_WriteReg).
In order to perform burst transfers you need to read/write from consecutive addresses. The Block transfer functions in the P9050 API already does this.
Most of today's PCI chip-sets detect the writes and transform them to a burst. We have customers who reached 60 MB/S this way. But - none of the known PCI chip-sets today detect reads, therefore you will not be able to perform burst reads. The transfer rate you can achieve on the PLX 9050 is 8-10 MB/S. There are some PLX9050 settings you can set (pre fetching) that will allow you to reach 20 MB/S on read. Regarding setting pre-fetching on, you can find more info on the PLX web-site. Remember that pre fetching is not good for reading info from a FIFO, since in this mode the PLX 9050 reads MORE data than what it really needs.

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