INCLUDE "altsyncram.inc";

Основной файл

SUBDESIGN altsyncram1
(
address_a[1..0] : INPUT;
address_b[1..0] : INPUT;
clock : INPUT;
data_a[31..0] : INPUT;
data_b[31..0] : INPUT;
wren_a : INPUT = VCC;
wren_b : INPUT = VCC;
q_a[31..0] : OUTPUT;
q_b[31..0] : OUTPUT;
)

VARIABLE

altsyncram_component : altsyncram WITH (
ADDRESS_REG_B = "CLOCK0",
CLOCK_ENABLE_INPUT_A = "BYPASS",
CLOCK_ENABLE_INPUT_B = "BYPASS",
CLOCK_ENABLE_OUTPUT_A = "BYPASS",
CLOCK_ENABLE_OUTPUT_B = "BYPASS",
INDATA_REG_B = "CLOCK0",
INTENDED_DEVICE_FAMILY = "Cyclone II",
LPM_TYPE = "altsyncram",
NUMWORDS_A = 4,
NUMWORDS_B = 4,
OPERATION_MODE = "BIDIR_DUAL_PORT",
OUTDATA_ACLR_A = "NONE",
OUTDATA_ACLR_B = "NONE",
OUTDATA_REG_A = "CLOCK0",
OUTDATA_REG_B = "CLOCK0",
POWER_UP_UNINITIALIZED = "FALSE",
READ_DURING_WRITE_MODE_MIXED_PORTS = "DONT_CARE",
WIDTHAD_A = 2,
WIDTHAD_B = 2,
WIDTH_A = 32,
WIDTH_B = 32,
WIDTH_BYTEENA_A = 1,
WIDTH_BYTEENA_B = 1,
WRCONTROL_WRADDRESS_REG_B = "CLOCK0"
);

BEGIN

q_a[31..0] = altsyncram_component.q_a[31..0];
q_b[31..0] = altsyncram_component.q_b[31..0];
altsyncram_component.wren_a = wren_a;
altsyncram_component.clock0 = clock;
altsyncram_component.wren_b = wren_b;
altsyncram_component.address_a[1..0] = address_a[1..0];
altsyncram_component.address_b[1..0] = address_b[1..0];
altsyncram_component.data_a[31..0] = data_a[31..0];
altsyncram_component.data_b[31..0] = data_b[31..0];
END;


Ссылка .inc
FUNCTION altsyncram1
(
address_a[1..0],
address_b[1..0],
clock,
data_a[31..0],
data_b[31..0],
wren_a,
wren_b
)

RETURNS (
q_a[31..0],
q_b[31..0]
);
Когда генерировал, тип блока М4К не указывал, стояло АВТО. В симуляторе прекрасно работает на частоте 216 МГц для -6, по описанию Fmax 230 МГц