|
|
Нет такого запрета. Да и не сегодня завтра 5 вольт вообще не будет.
Неужели 5вольт для этого заказывать будем или перейдем только на 2.5В и лишний источник поставим.
3 Multivoltage Device Issues
Smaller feature sizes are driving the need for dual voltage rail ICs. When designing with these
type components, be aware of potential issues such as latch-up and device electrical stressing.
Latch-up can take place when a device operates in a voltage range that brings about functional
uncertainties, placing all or a part of the device in a random unknown state. An example is hot
card insertion when subsystems are socketed into an active system before the power supply can
provide current to the device’s VCC and ground planes. With this scenario, larger than normal
currents can be present on the device due to low impedance paths being created from VCC to
ground. This could lead to electrical damage and device failure.
Electrical overstressing can also occur when improper VCC power sequencing up and down
occurs between the power rails. In multirail devices, differing voltages present the possibility of
higher voltages being placed on the gates to the drivers of the I/O. Internal parasitic structures
can conduct, reinforcing themselves until potentially destructive conductive currents are
produced. These higher potentials across the I/O or other pins can lead to abnormal stresses
placed on the oxide levels of the device. The net effect from this is potential long-term reliability
problems. These conditions can be avoided if the issues are understood and proper design
techniques are used. These include:
• Proper power-up and power-down sequencing of the core and I/Os
• Proper device power ramp-up
• Appropriate system-power management control implementation
• Full understanding of the characteristics of other components in the system, as well as
For proper device operation, suppliers of multivoltage devices often have specific guidelines the
designer must follow. TI recommends checking with the supplier to see if special conditions exist
for their device and if recommendations are given.
3.1 XilinxE Recommendations for VirtexE Series FPGAs
XilinxE has taken the necessary steps in designing their VirtexE FPGA products to make sure
the issues previously covered are of less concern with their products. A summary of their
recommendations and claims, documented in the data sheets, is as follows:
• The core (VCCINT) and I/O planes (VCCIO) on Xilinx Virtex FPGAs can be powered in any
order however removing VCCINT while still applying VCCIO over extended periods of time
may affect reliability of the device over time.
• VCC must rise monotonically and reach proper operating levels in less than 50 milliseconds
per device data sheet.
• Signal VIN levels should not exceed VCCIO by more than 3.6 V for protracted periods of time
(24 hours).
VirtexE devices I/Os are held at a known state (pulled up, pulled down, or in 3-state condition)
during power up. Once the device exceeds the minimum voltage required for proper operation,
the I/Os are released from their 3-state condition and set to their configured voltage levels. If
VCCINT is lost, the I/Os will go to the 3-state condition and return to their preconfiguration state.
NOTE: If input and I/O pins are left floating or toggling during configuration, the device may
consume additional current.
|
|
E-mail: 
info@telesys.ru
