„y „u„‹„u „r„Ќ„t„u„‚„w„{„p „y„x an075 (+) («Телесистемы»: „K„Ђ„~„†„u„‚„u„~„€„y„‘ «„P„‚„Ђ„s„‚„p„}„}„y„‚„…„u„}„Ќ„u „|„Ђ„s„y„‰„u„ѓ„{„y„u „ѓ„‡„u„}„Ќ „y „y„‡ „Ѓ„‚„y„}„u„~„u„~„y„u»)

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(«Телесистемы»: „K„Ђ„~„†„u„‚„u„~„€„y„‘ «„P„‚„Ђ„s„‚„p„}„}„y„‚„…„u„}„Ќ„u „|„Ђ„s„y„‰„u„ѓ„{„y„u „ѓ„‡„u„}„Ќ „y „y„‡ „Ѓ„‚„y„}„u„~„u„~„y„u»)

Отправлено net 15 апреля 2005 г. 00:25
В ответ на: „Ѓ„Ђ„}„u„‡„y „Ђ„„ „u„}„{„Ђ„ѓ„„„~„Ќ„‡ „ѓ„r„‘„x„u„z(+) отправлено net 15 „p„Ѓ„‚„u„|„‘ 2005 „s. 00:01

Thevenin Parallel Termination
An alternative parallel termination scheme uses a Thevenin voltage
divider. The terminating resistor is split between R1 and R2, which equals
the line impedance when combined. Although this scheme reduces the
current draw from the source device, it adds current drawn from the
power supply because the resistors are tied between VCC and ground.
Active Parallel Termination
In an active parallel termination scheme, the terminating resistor (RT = Z0)
is tied to a bias voltage (VBIAS). The bias voltage is such that the output
drivers are capable of drawing current from the high- and low-level
signals. However, this scheme requires a separate voltage source that can
sink and source currents to match the output transfer rates.
Series-RC Parallel Termination
In a series-RC parallel termination scheme, a resistor and capacitor
network is the terminating impedance. The terminating resistor (RT) is
equal to Z0; the capacitor must be greater than 100 pF. The capacitor
blocks low-frequency signals while passing high-frequency signals.
Therefore, the DC loading effect of RT does not have an impact on the
driver.
Series Termination
A series termination scheme matches the impedance at the signal source
instead of matching the impedance at each load. Because the output
impedance of Altera devices is low, add a series impedance to match the
signal source to the line impedance.
On an unmatched line, the source eventually reduces the reflections.
Adding the series termination helps attenuate secondary reflections. The
line impedance varies depending on the distribution of the load.
Therefore, a single resistor value cannot apply to all conditions. Altera
recommends using a 33-ѓ¶ series resistor to cover most impedances. This
method requires only a single component at the source rather than
multiple components at each load, but delays the signal path as it
increases the RC time constant.

„Ђ„q„‚„p„‹„p„ђ „r„~„y„}„p„~„y„u „~„p „†„‚„p„x„… Because the output
impedance of Altera devices is low, add a series impedance to match the
signal source to the line impedance.

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