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В каких соотношениях (t_setup, t_hold) находятся псевдо-CLK и DATA[]? Какова частота?
В редких случаях, когда пользовался стробом, просто ставил последовательно 33 Ом.
>А то уже страшно кварцевый генератор подключать к ПЛИС из-за этих наводок
Его нужно непременно иметь на растоянии 10+ см?
P.S.
<..>"High-speed design is not an issue of clock frequency, it's an issue of edge rates. When the signal can switch from one state to the other in less time than it takes to travel the length of the net, it is a high-speed design. <..> Corresponding with the edge rates are transition lengths for each logic family. The transition length is the lenght of the wire the signal will travel during the time required to switch from one logic level to the other. Lines longer than the transition length can be subject to reflection and may need terminations"<..>
Logic family/Tipical Edge Speed(ns)/Transition Electrical Length(in)
StandardTTL/5ns/29"
ASTTL/1.9ns/10.9"
FTTL/1.2ns/6.9"
BiCMOS/0.7ns/4.03"
Из: 'Debunking High-Speed PCB Design Myths', ASIC&EDA, July '93
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