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library IEEE;
use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;
entity rom is
port(
adr : in STD_LOGIC_VECTOR(3 downto 0);
d : out STD_LOGIC_VECTOR(8 downto 0)
);
end rom;
architecture arch of rom is
type rom_array is array (0 to 15) of std_logic_vector(8 downto 0);
constant roma : rom_array := (
"000000000", "000010011", "000100110", "000111001",
"001101010", "001011101", "101011111", "011100101",
"000001000", "000001001", "000001010", "000111111",
"100001100", "011000001", "110001110", "001101111");
begin
d <= roma(to_integer(unsigned(adr)));
end arch;
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