|
|
вход a[8..0] подключен не напрямую к пинам. ну и "Auto RAM Replacement" включен.
Warning: Created node my_ram:inst|ram~0 as a RAM by generating altsyncram megafunction to implement register logic with M512 or M4K memory block. Functionality differs from the original design.
Info: Inferred 1 megafunctions from design logic
Info: Inferred altsyncram megafunction (NUMWORDS_A=512, WIDTH_A=8) from the following design logic: my_ram:inst|ram~0
в AN238 такой пример:
module ram_infer(q, a, d, we, clk);
output[7:0] q;
input [7:0] d;
input [6:0] a;
input we, clk;
reg [7:0] q;
reg [6:0] read_add;
reg [7:0] mem [127:0];
always @(posedge clk) begin
if (we)
mem[a] <= d;
read_add <= a;
end
assign q = mem[read_add];
endmodule
E-mail: 
info@telesys.ru
