Отправлено Andy-P 28 апреля 2004 г. 19:54 В ответ на: Спасибо, а сама компонента в v701 сильно изменилась (новые сигналы, новый интерфейс)? отправлено cms 28 апреля 2004 г. 19:28

Из документации на 701:

3. UPGRADING DESIGN FROM PCI CORE V6.2.X
3.1. Targetmode
Target interface behavior changed significantly, please read “PCIX
& PCI Core User Guide Target
Mode” section carefully. Main changes are :
1. Core state machine is different : logic based on PCI core v6.2 state machine must be
redesigned.
2. Transaction control signals s_disco, s_abort, s_rdbusy and s_wrwait are replaced by
s_response[] : Logic based on these signals must be redesigned, note that some behaviors
allowed by PCI core v6.2 are no longer possible.
3. A maximum of two functions is now supported : s_function signal meaning has changed.
Design must be modified so that function #0 logic is activated when s_function is ‘0’, and
function #1 logic is activated when s_function is ‘1’.
4. Mapping configuration space in a BAR is no longer possible and there is no equivalent
function. Design and/or software must be adapted so that all applicationspecific
registers are
located in a BAR.
3.2. Mastermode
Please note that PCIX
& PCI core v7.0.1 contains a 36 or 72bit
x 8 internal DPRAM memory. Make
sure that target device has enough free memory blocks before upgrading a design.
Master interface has been enhanced but its behavior and interface is very similar, please read
“PCIX
& PCI Core User Guide – Master Mode” section carefully. Main changes are :
1. m_data_out[] signal has been removed, data is ready from s_data_out[] instead.
2. Some bus commands, including memory write and invalidate are no longer supported. In
addition to that some restrictions apply to “single” commands.
3. DMA channels are no longer assigned a fixed function number, but function number is
programmed by backend logic for each transfer.
4. m_dma_status[] now includes channel status code, and this code is no longer available
from m_dma_regout[].