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Once a DMA transfer is requested at one of the ports, the corresponding time-out counter is incremented every SYSCLK1 cycle. If the transfer has not been completed within 512 SYSCLK1 cycles, a time-out error signal is generated. The time-out counter for all four DMA ports is disabled by default, but can be enabled for each individual port through the DMAGTCR.
In response to a time-out error signal, activity in the affected DMA channel stops.
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Тоже не раз наступал на эти грабли, когда передача тихо останавливалась если например случайно ;) в странице DMA оказывался си-шный цикл с кучей BCC. За что и матерю Техас за такое распределение приоритетов.