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To ensure that the TMS320C6000 does not generate signals unless the supply voltages
are at appropriate levels, it is necessary to place a supervisor on the power supplies.
Whenever the device is powered up, it should be held in reset until both the 3.3-V I/O
supply (DVdd) and the 2.5-V core supply (CVdd) reach nominal values. Likewise, the
device should be held in reset anytime either supply falls below a certain threshold value
(88%).
One simple way to accomplish both of these tasks is to set a supervisor on each of the
supply voltages, DVdd and CVdd. For example, the Texas Instruments TLC7733 and
TLC7725 voltage supervisors each assert a /RESET signal (active low) during power-up
when their supply voltage reaches 1 V. This signal continues to be asserted until DVdd
reaches its threshold voltage (plus an additional delay period),1 at which time the device
is released from reset. The /RESET signal is reasserted anytime the voltage level falls
below 90% (2.93 V for the TLC7733 and 2.25 V for the ‘7725).
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